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FPGA与USB通信的测试代码
- FPGA与USB通信的测试代码，包括FPGA中的程序（Verilog编写）和PC机上的主控程序以及USB固件程序。,FPGA and the USB communication test code, including the FPGA in the procedure [Verilog prepared] and PC-control procedures, as well as the USB firmware.
实现USB接口功能的VHDL和verilog完整源代码
- 实现USB接口功能的VHDL和verilog完整源代码,Implementation USB interface functions of the VHDL and Verilog source code integrity
T2_USB_IN.rar
- usb芯片cy7c68013从fpga中读入数据的演示程序，verilog语言,CY7C68013 chip usb read from the FPGA into the data presentation process, verilog language
USB.rar
- USB接口的测试程序，Verilog语言编写 ,USB
USB_kz
- 提供Cy7C68013 USB芯片开发源程序，由verilog编写-Cy7C68013 USB chip to provide the development of source code, prepared by the Verilog
USB_Interface
- verilog USB USB的slave fifo的控制-verilog USB
基于USB-ATA接口的海量存储器的设计与实现
- 介绍了一种基于通用可编程接口的通用串行总线-高级技术配件解决方案，将普通硬盘转化为Usb Mass Storage.-introduces a general programmable interface based on the Universal Serial Bus-senior technical accessories solution that will drive into ordinary Usb Mass Storage.
FPGAkaifashilidaohang
- 《FPGA数字电子系统设计与开发实例导航》的配套光盘，Verilog编写，USB、I2C、MAC的接口设计-"FPGA digital electronic system design and development examples navigation" matching discs, Verilog prepared, USB, I2C, the MAC interface design -err
usb_funct
- USB 2.0 verilog源代码,内包含详细文档资料。-USB 2.0 verilog source code, which contains detailed documentation.
USBverilog
- verilog USB程序，经过实践调试，并且都能成功实现-verilog USB procedures, debugging practice, and can be successfully achieved
usb-blaster
- quartus多种USB-bletera 自制下载线！
DE2_SDCARD
- DE2 开发板上，NIOS编程。对SD卡以及USB的读写操作的实例。我的代码及工程绝对完整！代码其实是Verilog编写的。-DE2 development board, NIOS programming. On the SD card and USB examples of read and write operations. My absolute integrity of code and works! Verilog code is written.
USB
- Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
pci-verilog
- USB及PCI总线设计的一些源代码（经测试）-USB and PCI bus design some of the source code
NIOS_USB_API_demo
- 在nios系统开发中的驱动usb接口芯片的代码,包括verilog代码,与相应的驱动代码-In the nios system development driver usb interface chip of the code, including the verilog code, and the corresponding driver code
verilog
- source code for USB 2.0 fonction core in verilog
fifo
- fifo用Verilog hdl的实现，这是一个比较常用的源码，文档中有很详细的注释，初学者应该可以看懂。-implementation using Verilog hdl usb, this is a common source, the document had a very detailed notes, beginners should understand.
verilog-usb--protel-design
- 基于FPGA的usb2.0 ip核设计，所用的语言是verilog-FPGA-based usb2.0 ip core design, the language used is the verilog
module-usb
- usb verilog code for transmitter
usb
- USB的verilog IP模块，经过DesignCompiler综合验证-USB-verilog IP module, comprehensive verification through DesignCompiler